GlobalPlatform has unveiled Pavona, an open-source silicon ecosystem that embeds security certification pathways directly into hardware development workflows rather than treating them as an afterthought. Announced on 26 May, the initiative brings together Meta, Qualcomm, Tenstorrent, Winbond, and the University of Oxford to tackle the cost and complexity of post-design certification.
From Post-Design Audits to Continuous Validation
Silicon certification for standards like Common Criteria, ISO 26262, and GlobalPlatform's Trusted Execution Environment specifications has traditionally been a lengthy, expensive process conducted after chip designs are largely complete. Pavona inverts this model by providing reference architectures, reusable TEE modules, and automated validation workflows that teams can integrate during early architectural planning — targeting reductions in redesign cycles, cost, and time-to-market.
The framework treats compliance as a continuous thread throughout the engineering lifecycle. By standardizing secure building blocks and making them openly available, the project aims to lower barriers for organizations developing chips for AI workloads, edge computing, and embedded memory applications.
Formal Verification Bridges the Trust Gap
The University of Oxford's involvement brings formal verification expertise to the initiative. Researchers will contribute mathematical proof techniques for validating security implementations, adding deterministic assurance beyond traditional testing. This addresses a core industry tension: open-source hardware enables peer review, but enterprise procurement teams and certification bodies require the rigorous, audit-ready validation that formal methods provide.
The combination of industry engineering resources and academic verification capabilities positions Pavona to serve sectors ranging from automotive systems requiring functional safety certification to data center accelerators handling sensitive workloads.
Open Core, Proprietary Layers
Pavona's sustainability model keeps the core framework openly licensed while allowing vendors to layer proprietary optimizations and performance tuning on top. This structure preserves commercial differentiation and competitive incentives without fracturing the ecosystem — a balance that has derailed other open-source hardware initiatives.
For IT professionals and security teams, Pavona represents a potential shift in how hardware security is evaluated and procured. If certification bodies formally recognize designs validated through the framework's embedded workflows, organizations could see accelerated timelines for deploying certified silicon in regulated environments.
Whether Pavona delivers on that promise depends on measurable early adoption, successful pilot deployments, and whether standards bodies accept its validation outputs in place of traditional third-party audits. Those metrics over the next 12–24 months will determine if this is a genuine paradigm shift or another well-intentioned initiative that falls short of industry uptake.
GlobalPlatform 推出開源晶片生態系統 Pavona，將安全認證路徑直接嵌入硬件開發工作流程，而非視其為事後補救。該計劃於 5 月 26 日宣佈，匯聚 Meta、Qualcomm、Tenstorrent、Winbond 及牛津大學，旨在解決設計完成後認證所衍生的成本與複雜性問題。
由設計後審核轉向持續驗證
以往針對 Common Criteria、ISO 26262 及 GlobalPlatform 的 Trusted Execution Environment 規格等晶片認證，通常是在晶片設計大致完成後才進行，過程冗長且費用高昂。Pavona 顛覆此模式，提供參考架構、可重用 TEE 模組及自動化驗證工作流程，讓團隊可在早期架構規劃階段整合，目標是減少重新設計循環、降低成本及縮短上市時間。
該框架將合規視為貫穿整個工程生命週期的持續線索。透過標準化安全構建模組並公開提供，項目旨在降低機構開發用於 AI 工作負載、edge computing 及嵌入式記憶體應用晶片的門檻。
形式化驗證彌合信任鴻溝
牛津大學的參與為計劃帶來形式化驗證專業知識。研究人員將貢獻數學證明技術以驗證安全實施，在傳統測試之外提供確定性保證。這解決了一個行業核心矛盾：開源硬件允許同儕審查，但企業採購團隊和認證機構需要形式化方法所提供的嚴格、可審計驗證。
結合業界工程資源與學術驗證能力，Pavona 可服務從需要功能安全認證的汽車系統，至處理敏感工作負載的數據中心加速器等多個領域。
開放核心，專有層疊
Pavona 的可持續發展模式保持核心框架開放授權，同時允許供應商在頂層疊加專有優化及性能調校。此結構在保持商業差異化和競爭誘因的同時，避免生態系統分裂——此平衡曾令其他開源硬件計劃功虧一簣。
對 IT 專業人員及安全團隊而言，Pavona 代表硬件安全評估與採購方式的潛在轉變。若認證機構正式認可透過框架嵌入式工作流程驗證的設計，機構或可在受監管環境中加速部署認證晶片的時程。
Pavona 能否兌現承諾，取決於早期採用情況、成功試點部署，以及標準機構是否接受其驗證輸出以取代傳統第三方審核。未來 12 至 24 個月的這些指標，將決定這是一場真正的典範轉移，還是另一項立意良好卻未能獲得業界採納的計劃。